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| DM74ALS273 Octal D-Type Edge-Triggered Flip-Flop with Clear April 1984 Revised February 2000 DM74ALS273 Octal D-Type Edge-Triggered Flip-Flop with Clear General Description These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information at the D inputs meeting the setup requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the HIGH or LOW level, the D input signal has no effect at the output. Features s Switching specifications at 50 pF s Switching specifications guaranteed over full temperature and VCC range s Buffer-type outputs and improved AC offer significant advantage over DM74LS273. s Advanced oxide-isolated, ion-implanted Schottky TTL process s Functionally DM74LS273. and pin-for-pin compatible with Ordering Code: Order Number DM74ALS273WM DM74ALS273SJ DM74ALS273MSA DM74ALS273N Package Number M20B M20D MSA20 N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Connection Diagram (c) 2000 Fairchild Semiconductor Corporation DS006216 www.fairchildsemi.com DM74ALS273 Function Table (Each Flip-Flop) Inputs Clear L H H H Clock X L D X H L X Output Q L H L Q0 Logic Diagram L = LOW State H = HIGH State X = Don't Care = Positive Edge Transition Q0 = Previous Condition of Q www.fairchildsemi.com 2 DM74ALS273 Absolute Maximum Ratings(Note 1) Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Typical JA N Package M Package 60.0C/W 79.0C/W 7V 7V 0C to +70C -65C to +150C Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL fCLK tW(CLK) tW tSU tH TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Clock Frequency Width of Clock Pulse Width of Clear Pulse Data Setup Time (Note 2) Clear Inactive Data Hold Time Free Air Operating Temperature HIGH LOW LOW 0 14 14 10 10 15 0 0 70 Parameter Min 4.5 2 0.8 -2.6 24 35 Nom 5 Max 5.5 Units V V V mA mA MHz ns ns ns ns ns C Note 2: The () arrow indicates the positive edge of the Clock is used for reference. Electrical Characteristics over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25C. Symbol VIK VOH VOL II IIH IIL IO ICC Parameter Input Clamp Voltage HIGH Level Output Voltage LOW Level Output Voltage HIGH Level Input Current LOW Level Input Current Output Drive Current Supply Current VCC = 4.5V VCC = 4.5V to 5.5V VCC = 4.5V Conditions VCC = 4.5V, II = -18 mA IOH = -2.6 mA IOH = -400 A IOL = 12 mA IOL = 24 mA 2.4 VCC - 2 0.25 0.35 0.4 0.5 0.1 20 -0.2 VO = 2.25V Outputs HIGH Outputs LOW -30 11 19 -112 20 29 3.3 Min Typ Max -1.5 Units V V V V V mA A mA mA mA mA Input Current @ Maximum Input Voltage VCC = 5.5V, VIH = 7V VCC = 5.5V, VIH = 2.7V VCC = 5.5V, VIL = 0.4V VCC = 5.5V VCC = 5.5V Outputs OPEN Switching Characteristics over recommended operating free air temperature range. Symbol fMAX tPHL tPLH tPHL Parameter Maximum Clock Frequency Propagation Delay Time HIGH-to-LOW Level Output Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Conditions VCC = 4.5V to 5.5V RL = 500 CL = 50 pF Clear Clock Clock Any Q Any Q Any Q From To Min 35 4 2 3 18 12 15 Max Units MHz ns ns ns 3 www.fairchildsemi.com DM74ALS273 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B www.fairchildsemi.com 4 DM74ALS273 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com DM74ALS273 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide Package Number MSA20 www.fairchildsemi.com 6 DM74ALS273 Octal D-Type Edge-Triggered Flip-Flop with Clear Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com |
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